365体育|365体育投注@ers at Tohoku University and NEC Corporation have discovered a new technique for compressing the computations of encryption and decryption operations known as Galois field arithmetic operations.
The group, from the 365体育|365体育投注@ Institute of Electrical Communication, has thus succeeded in developing the world's most efficient Advanced Encryption Standard (AES) cryptographic processing circuit, whose energy consumption is reduced by more than 50% of the current level.
With this achievement, it has become possible to include encryption technology in information and communication technology (ICT) devices that have tight energy constraints, greatly enhancing the safety of the next-generation Internet of Things (IoT).
This result was announced on August 19, 2016 during the Conference on Cryptographic Hardware and Embedded Systems (CHES 2016) hosted by the International Association for Cryptologic 365体育|365体育投注@ (IACR) in Santa Barbara, USA.
- Publication Details:
Authors: Rei Ueno; Sumio Morioka; Naofumi Homma; Takafumi Aoki
Title: A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths --- Toward Efficient CBC-Mode Implementation
Journal: Cryptographic Hardware and Embedded Systems - CHES 2016
DOI: 10.1007/978-3-662-53140-2_26
365体育|365体育投注@:
Naofumi Homma365体育|365体育投注@ Institute of Electrical CommunicationTohoku University
Email: homma@riec.tohoku.ac.jp